KAHLUA: a hierarchical circuit disassembler

  • Authors:

  • B. Lin;A. R. Newton

  • Affiliations:

  • Electronics Research Laboratory, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, California;Electronics Research Laboratory, Department of Electrical Engineering and Computer Sciences, University of California, Berkeley, California

  • Venue:
  • DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
  • Year:
  • 1987

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Abstract

A new tool called a circuit disassembler has been developed to transform a mask level layout into an equivalent symbolic layout. This technique has been implemented in the program called KAHLUA that can handle mask layout containing arbitrary Manhattan geometry and is independent of the circuit technology. Circuits designed using physical layout systems can be automatically disassembled into a symbolic environment. Once converted, the disassembled cells can be manipulated further by any existing symbolic design or verification tools. In particular, these cells can be automatically remapped for a new technology. Our formulation of the problem consists of two major stages: device extraction, and net decomposition. In the first stage the transistors and contacts are extracted from the layout to form leaf cells. In the second stage a set of symbolic wires is derived from the remaining interconnect geometry. KAHLUA has been tested on a wide range of physical cells and has produced high quality results with modest execution times. An additional feature of the technique include the ability to disassemble hierarchically, which makes disassembling large layouts feasible.