KAHLUA: a hierarchical circuit disassembler
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Fast printed circuit board routing
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Wire routing by optimizing channel assignment within large apertures
25 years of DAC Papers on Twenty-five years of electronic design automation
An optimum channel-routing algorithm for polycell layouts of integrated circuits
25 years of DAC Papers on Twenty-five years of electronic design automation
25 years of DAC Papers on Twenty-five years of electronic design automation
A multi-pass, multi-algorithm approach to PCB routing
25 years of DAC Papers on Twenty-five years of electronic design automation
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
DYNAJUST: an efficient automatic routing technique optimizing delay conditions
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A gridless router for industrial design rules
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Resistance extraction using a routing algorithm
DAC '93 Proceedings of the 30th international Design Automation Conference
A compaction method for full chip VLSI layouts
DAC '93 Proceedings of the 30th international Design Automation Conference
A new generalized row-based global router
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
ISPD '98 Proceedings of the 1998 international symposium on Physical design
Congestion driven quadratic placement
DAC '98 Proceedings of the 35th annual Design Automation Conference
Routing algorithm for gate array macro cells
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
GEMS: an automatic layout tool for MIMOLA schematics
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A new routing algorithm and its hardware implementation
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A new approach to multi-layer PCB routing with short vias
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
A current driven routing and verification methodology for analog applications
Proceedings of the 37th Annual Design Automation Conference
Single step current driven routing of multiterminal signal nets for analog applications
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A sequential detailed router for huge grid graphs
Proceedings of the conference on Design, automation and test in Europe
Comparative router performance
ACM SIGDA Newsletter
Proceedings of the 39th annual Design Automation Conference
Multilevel approach to full-chip gridless routing
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
An Efficient VLSI Switch-Box Router
IEEE Design & Test
Advanced routing in changing technology landscape
Proceedings of the 2003 international symposium on Physical design
A novel framework for multilevel routing considering routability and performance
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
An enhanced multilevel routing system
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
A global routing algorithm for general cells
DAC '84 Proceedings of the 21st Design Automation Conference
A switchbox router with obstacle avoidance
DAC '84 Proceedings of the 21st Design Automation Conference
The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing
DAC '81 Proceedings of the 18th Design Automation Conference
An algorithm for searching shortest path by propagating wave fronts in four quadrants
DAC '81 Proceedings of the 18th Design Automation Conference
Computation of power supply nets in VLSI layout
DAC '81 Proceedings of the 18th Design Automation Conference
Routing of printed circuit boards
DAC '81 Proceedings of the 18th Design Automation Conference
Performance of interconnection rip-up and reroute strategies
DAC '81 Proceedings of the 18th Design Automation Conference
Implementation of an interactive printed circuit design system
DAC '78 Proceedings of the 15th Design Automation Conference
A multi-pass, multi-algorithm approach to PCB routing
DAC '78 Proceedings of the 15th Design Automation Conference
A topologically based non-minimum distance routing algorithm
DAC '78 Proceedings of the 15th Design Automation Conference
The interconnection problem - a tutorial
DAC '73 Proceedings of the 10th Design Automation Workshop
A router for multilayer printed wiring backplanes
DAC '73 Proceedings of the 10th Design Automation Workshop
An optimum channel-routing algorithm for polycell layouts of integrated circuits
DAC '73 Proceedings of the 10th Design Automation Workshop
DAC '80 Proceedings of the 17th Design Automation Conference
A line-expansion algorithm for the general routing problem with a guaranteed solution
DAC '80 Proceedings of the 17th Design Automation Conference
An implementation of a saturated zone multi-layer printed circuit board router
DAC '80 Proceedings of the 17th Design Automation Conference
An automatic routing system for high density multilayer printed wiring boards
DAC '80 Proceedings of the 17th Design Automation Conference
A data structure for gridless routing
DAC '80 Proceedings of the 17th Design Automation Conference
A successful automated IC design system
DAC '76 Proceedings of the 13th Design Automation Conference
A new routing algorithm for two-sided boards with floating vias
DAC '76 Proceedings of the 13th Design Automation Conference
A new philosophy for interconnection on multilayer boards
DAC '76 Proceedings of the 13th Design Automation Conference
Automatic generation of logic diagrams
DAC '76 Proceedings of the 13th Design Automation Conference
DAC '76 Proceedings of the 13th Design Automation Conference
On the topological aspects of the circuit layout problem
DAC '76 Proceedings of the 13th Design Automation Conference
A high quality, low cost router for MOS/LSI
DAC '72 Proceedings of the 9th Design Automation Workshop
A method for rapid testing of beam crossover circuits
DAC '72 Proceedings of the 9th Design Automation Workshop
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
NOMAD: A printed wiring board layout system
DAC '75 Proceedings of the 12th Design Automation Conference
A rectangle-probe router for multilayer P.C. boards*
DAC '77 Proceedings of the 14th Design Automation Conference
Computer/interactive cleanup of non-gridded PWB's after automatic routing
DAC '77 Proceedings of the 14th Design Automation Conference
A production PCB layout system on a minicomputer
DAC '77 Proceedings of the 14th Design Automation Conference
A human engineered PCB design system
DAC '77 Proceedings of the 14th Design Automation Conference
A new two-dimensional routing algorithm
DAC '82 Proceedings of the 19th Design Automation Conference
A minimum-impact routing algorithm
DAC '82 Proceedings of the 19th Design Automation Conference
A layout synthesis system for NMOS gate-cells
DAC '82 Proceedings of the 19th Design Automation Conference
Automated rip-up and reroute techniques
DAC '82 Proceedings of the 19th Design Automation Conference
On routing for custom integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
A simple, efficient design automation processor
DAC '74 Proceedings of the 11th Design Automation Workshop
Dynamic design rule checking in an interactive printed circuit editor
DAC '79 Proceedings of the 16th Design Automation Conference
Buffered Routing Tree Construction Under Buffer Placement Blockages
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
A global router for sea-of-gates circuits
EURO-DAC '91 Proceedings of the conference on European design automation
A Fast Crosstalk- and Performance-Driven Multilevel Routing System
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
ISQED '05 Proceedings of the 6th International Symposium on Quality of Electronic Design
Optimising automatic tracking of multilayer boards
ACM SIGDA Newsletter
ACM SIGDA Newsletter
CDCTree: novel obstacle-avoiding routing tree construction based on current driven circuit model
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
An-OARSMan: obstacle-avoiding routing tree construction with good length performance
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Multilevel full-chip gridless routing considering optical proximity correction
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
An O(nlogn) algorithm for obstacle-avoiding routing tree construction in the λ-geometry plane
Proceedings of the 2006 international symposium on Physical design
Efficient obstacle-avoiding rectilinear steiner tree construction
Proceedings of the 2007 international symposium on Physical design
Studying a GALS FPGA architecture using a parameterized automatic design flow
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Circuit-simulated obstacle-aware Steiner routing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
IEEE Transactions on Computers
A full-scale solution to the rectilinear obstacle-avoiding Steiner problem
Integration, the VLSI Journal
Path planning on a compressed terrain
Proceedings of the 16th ACM SIGSPATIAL international conference on Advances in geographic information systems
A computer-aided VLSI layout system
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Analog layout generator for CMOS circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Detailed-routing algorithms for dense pin clusters in integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 2009 International Conference on Computer-Aided Design
Bus via reduction based on floorplan revising
Proceedings of the 20th symposium on Great lakes symposium on VLSI
Optimum path communication system based on modulated AC local current comparison method
CSECS '10 Proceedings of the 9th WSEAS international conference on Circuits, systems, electronics, control & signal processing
Wire synthesizable global routing for timing closure
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Extended global routing with RLC crosstalk constraints
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
EvoCOP'10 Proceedings of the 10th European conference on Evolutionary Computation in Combinatorial Optimization
Hi-index | 0.00 |
This paper discusses a new line-routing algorithm. The algorithm has been programmed in FORTRAN II for the IBM 7094 and in FORTRAN IV for the IBM 360/65. It has given good results when applied to many line-routing problems such as mazes, printed circuit boards, substrates, and PERT diagrams. The main advantages of this algorithm, which is based on the continuous plane, over conventional algorithms based on the discrete plane are twofold: 1. Since the algorithm is based on the continuous plane, there is theoretically no limit to the degree of precision used to describe the position of points. In practice, the only factor restricting the precision is the magnitude of the largest (or smallest) number which may be stored in a computer. As a result, the nodes on a printed circuit board, for example, can be input with mil accuracy. If this feat were to be accomplished by existing methods on a 9×9 inch board, a matrix of 81,000,000 cells would have to be stored (and searched) in the computer. 2. The algorithm stores only line segments; therefore to find a path, only the segments that are currently defined need be investigated. Usually with conventional methods, every cell that lies on every possible minimal path must be investigated. The net result is that this algorithm is much faster than the conventional method.