An enhanced multilevel routing system
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Track assignment: a desirable intermediate step between global routing and detailed routing
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
DAC '78 Proceedings of the 15th Design Automation Conference
A solution to line-routing problems on the continuous plane
DAC '69 Proceedings of the 6th annual Design Automation Conference
Pseudopin assignment with crosstalk noise control
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Multilevel routing with antenna avoidance
Proceedings of the 2004 international symposium on Physical design
Phase correct routing for alternating phase shift masks
Proceedings of the 41st annual Design Automation Conference
Manufacturing-Aware Physical Design
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Physical CAD changes to incorporate design for lithography and manufacturability
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Improved multilevel routing with redundant via placement for yield and reliability
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
RADAR: RET-aware detailed routing using fast lithography simulations
Proceedings of the 42nd annual Design Automation Conference
Yield-preferred via insertion based on novel geotopological technology
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Redundant-via enhanced maze routing for yield improvement
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Via Distribution Model for Yield Estimation
ISQED '06 Proceedings of the 7th International Symposium on Quality Electronic Design
The impact of the nanoscale on computing systems
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Optimal jumper insertion for antenna avoidance under ratio upper-bound
Proceedings of the 43rd annual Design Automation Conference
Multilevel routing with jumper insertion for antenna avoidance
Integration, the VLSI Journal
Double-via-driven standard cell library design
Proceedings of the conference on Design, automation and test in Europe
Discharge-path-based antenna effect detection and fixing for X-architecture clock tree
Integration, the VLSI Journal
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As process technology continue to advance, the operating environment for routing tools has changed significantly. While the general concept of routing and techniques employed remain the same,the complexities and challenges that modern-day routers face are not well understood or addressed by the research community. In this paper, we will examine a handful of interesting nanometer effects that have significant impact on the behavior of routers, and discuss several opportunities in which routers can play a more important role in improving the manufacturability of nanometer designs.