LTX - a system for the directed automatic design of LSI circuits
DAC '76 Proceedings of the 13th Design Automation Conference
DAC '76 Proceedings of the 13th Design Automation Conference
A high quality, low cost router for MOS/LSI
DAC '72 Proceedings of the 9th Design Automation Workshop
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
A solution to line-routing problems on the continuous plane
DAC '69 Proceedings of the 6th annual Design Automation Conference
Cellular wiring and the cellular modeling technique
DAC '69 Proceedings of the 6th annual Design Automation Conference
A min-cut placement algorithm for general cell assemblies based on a graph representation
DAC '79 Proceedings of the 16th Design Automation Conference
Placement and routing algorithms for hierarchical integrated circuit layout
Placement and routing algorithms for hierarchical integrated circuit layout
Routing method for VLSI design using irregular cells
DAC '83 Proceedings of the 20th Design Automation Conference
An over-cell gate array channel router
DAC '83 Proceedings of the 20th Design Automation Conference
A wire routing scheme for double-layer cell arrays
DAC '84 Proceedings of the 21st Design Automation Conference
The Hughes Automated Layout System - automated LSI/VLSI layout based on channel routing
DAC '81 Proceedings of the 18th Design Automation Conference
Computation of power supply nets in VLSI layout
DAC '81 Proceedings of the 18th Design Automation Conference
Automated rip-up and reroute techniques
DAC '82 Proceedings of the 19th Design Automation Conference
CGALA-a multi technology Gate Array Layout system
DAC '82 Proceedings of the 19th Design Automation Conference
On routing for custom integrated circuits
DAC '82 Proceedings of the 19th Design Automation Conference
Channel routing with non-terminal doglegs
EURO-DAC '90 Proceedings of the conference on European design automation
A computer-aided VLSI layout system
AFIPS '81 Proceedings of the May 4-7, 1981, national computer conference
Integration, the VLSI Journal
Proceedings of the eighth IEEE/ACM/IFIP international conference on Hardware/software codesign and system synthesis
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A “generalized” channel router operates on horizontal and vertical channels generated from an irregular cell structure, and is free of a routing grid. Such a router can solve virtually any routing problem. It has two major phases: the global routing phase and the channel routing phase. This paper describes both phases as they have been implemented at TI. It concludes with a demonstration of the versatility of the router (it is used to solve the Hampton Court Maze) and with applications of the router in TI's I2L (Integrated Injector Logic) / STL (Schottky Transistor Logic) Automatic Layout System.