Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles
IEEE Transactions on Computers
An automated design of minimum-area IC power/ground nets
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Rectilinear shortest paths through polygonal obstacles in O(n(logn)2) time
SCG '87 Proceedings of the third annual symposium on Computational geometry
Combinatorial algorithms for integrated circuit layout
Combinatorial algorithms for integrated circuit layout
Rectilinear shortest paths with rectangular barriers
SCG '85 Proceedings of the first annual symposium on Computational geometry
Algorithms for VLSI Physical Design Automation
Algorithms for VLSI Physical Design Automation
An Introduction to VLSI Physical Design
An Introduction to VLSI Physical Design
Computation of power supply nets in VLSI layout
DAC '81 Proceedings of the 18th Design Automation Conference
DAC '78 Proceedings of the 15th Design Automation Conference
A solution to line-routing problems on the continuous plane
DAC '69 Proceedings of the 6th annual Design Automation Conference
Finding obstacle-avoiding shortest paths using implicit connection graphs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A current driven routing and verification methodology for analog applications
Proceedings of the 37th Annual Design Automation Conference
Current-driven wire planning for electromigration avoidance in analog circuits
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Optimal wiring topology for electromigration avoidance considering multiple layers and obstacles
Proceedings of the 19th international symposium on Physical design
Simultaneous analog placement and routing with current flow and current density considerations
Proceedings of the 50th Annual Design Automation Conference
WiT: optimal wiring topology for electromigration avoidance
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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