Efficient Algorithms for Shortest Paths in Sparse Networks
Journal of the ACM (JACM)
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
An optimum channel-routing algorithm for polycell layouts of integrated circuits
DAC '73 Proceedings of the 10th Design Automation Workshop
DAC '76 Proceedings of the 13th Design Automation Conference
Wire routing by optimizing channel assignment within large apertures
DAC '71 Proceedings of the 8th Design Automation Workshop
A solution to line-routing problems on the continuous plane
DAC '69 Proceedings of the 6th annual Design Automation Conference
The chip layout problem: An automatic wiring procedure
DAC '77 Proceedings of the 14th Design Automation Conference
Placement and routing algorithms for hierarchical integrated circuit layout
Placement and routing algorithms for hierarchical integrated circuit layout
Shape determination and placement algorithms for hierarchical integrated circuit layout
Shape determination and placement algorithms for hierarchical integrated circuit layout
Big Omicron and big Omega and big Theta
ACM SIGACT News
A multi-layer router utilizing over-cell areas
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
A wire routing scheme for double-layer cell arrays
DAC '84 Proceedings of the 21st Design Automation Conference
Routability checking for three-dimensional architectures
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A routing heuristic is presented thatroutes two-terminal nets one at a time, for each net choosing the path so as to avoid adversely impacting the nets not yet routed. An algorithm is presented and proved to correctly implement this heuristic; the computational complexity of that algorithm is shown to be polynomially bounded, but perhaps still too great to be of practical use. Another, speedier algorithm is presented that seems to approximate the heuristic rather closely. Strong evidence is given that the Lee routing algorithm is in some sense inadequate to implement this heuristic. The heuristic has been applied, with very encouraging results, to a specific routing problem: the routing of a channel in which all four sides of the channel may contain terminals. This problem arises in the layout of custom VLSI.