Rectilinear Shortest Paths and Minimum Spanning Trees in the Presence of Rectilinear Obstacles
IEEE Transactions on Computers
DAC '78 Proceedings of the 15th Design Automation Conference
A solution to line-routing problems on the continuous plane
DAC '69 Proceedings of the 6th annual Design Automation Conference
An-OARSMan: obstacle-avoiding routing tree construction with good length performance
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Efficient obstacle-avoiding rectilinear steiner tree construction
Proceedings of the 2007 international symposium on Physical design
Efficient multilayer routing based on obstacle-avoiding preferred direction steiner tree
Proceedings of the 2008 international symposium on Physical design
A full-scale solution to the rectilinear obstacle-avoiding Steiner problem
Integration, the VLSI Journal
Obstacle-avoiding rectilinear Steiner tree construction
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
High-performance obstacle-avoiding rectilinear steiner tree construction
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Generation of optimal obstacle-avoiding rectilinear Steiner minimum tree
Proceedings of the 2009 International Conference on Computer-Aided Design
Efficient multi-layer obstacle-avoiding preferred direction rectilinear Steiner tree construction
Proceedings of the 16th Asia and South Pacific Design Automation Conference
Obstacle-avoiding rectilinear Steiner tree construction in sequential and parallel approach
Integration, the VLSI Journal
Hi-index | 0.00 |
Routing tree construction is a fundamental problem in modern VLSI design. In this paper we propose CDC-Tree, an Obstacle-Avoiding Rectilinear Steiner Minimum Tree (OARSMT) heuristic algorithm to construct an OARSMT. CDC-Tree is based on the current driven circuit (CDC) model mapped from an escape graph. The circuit structure comes from the topology of the escape graph, with each edge replaced by a resistor indicating the wirelength of that edge. By performing DC analysis on the circuit and selecting the edges according to the current distribution to construct an OARSMT, the wirelength of the resulting tree is short. The algorithm has been implemented and tested on cases of different scales and with different shapes of obstacles. Experiments show that CDCTree can achieve shorter wirelength than the existing best algorithm, An-OARSMan, when the terminal number of a net is less than 50.