ISCLEs: Importance Sampled Circuit Learning Ensembles for Trustworthy Analog Circuit Topology Synthesis

  • Authors:
  • Peng Gao;Trent Mcconaghy;Georges Gielen

  • Affiliations:
  • ESAT-MICAS, K.U. Leuven, Leuven, Belgium;ESAT-MICAS, K.U. Leuven, Leuven, Belgium and Solido Design Automation Inc., Saskatoon, Canada;ESAT-MICAS, K.U. Leuven, Leuven, Belgium

  • Venue:
  • ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
  • Year:
  • 2008

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Abstract

Importance Sampled Circuit Learning Ensembles (ISCLEs) is a novel analog circuit topology synthesis method that returns designer-trustworthy circuits yet can apply to a broad range of circuit design problems including novel functionality. ISCLEs uses the machine learning technique of boosting, which does importance sampling of "weak learners" to create an overall circuit ensemble. In ISCLEs, the weak learners are circuit topologies with near-minimal transistor sizes. In each boosting round, first a new weak learner topology and sizings are found via genetic programming-based "MOJITO" multi-topology optimization, then it is combined with previous learners into an ensemble, and finally the weak-learning target is updated. Results are shown for the trustworthy synthesis of a sinusoidal function generator, and a 3-bit A/D converter.