ARCHGEN: automated synthesis of analog systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Analog compilation based on successive decompositions
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Computer-Aided Design of Analog Integrated Circuits and Systems
Computer-Aided Design of Analog Integrated Circuits and Systems
ALPS: the age-layered population structure for reducing the problem of premature convergence
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Proceedings of the 43rd annual Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
A synthesis system for analog circuits based on evolutionary search and topological reuse
IEEE Transactions on Evolutionary Computation
The invention of CMOS amplifiers using genetic programming and current-flow analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Integer programming based topology selection of cell-level analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Topology synthesis of analog circuits based on adaptively generated building blocks
Proceedings of the 45th annual Design Automation Conference
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
Automated extraction of expert knowledge in analog topology selection and sizing
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Importance sampled circuit learning ensembles for robust analog IC design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Computation of yield-optimized Pareto fronts for analog integrated circuit specifications
Proceedings of the Conference on Design, Automation and Test in Europe
Massively multi-topology sizing of analog integrated circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Hierarchical component-based representations for evolving microelectromechanical systems designs
Artificial Intelligence for Engineering Design, Analysis and Manufacturing
Design of robust metabolic pathways
Proceedings of the 48th Design Automation Conference
An algorithm for exploiting modeling error statistics to enable robust analog optimization
Proceedings of the International Conference on Computer-Aided Design
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This paper presents MOJITO, a system which optimizes across thousands of analog circuit topologies simultaneously, and returns a set of sized topologies that collectively provide a performance tradeoff. MOJITO defines a space of possible topologies as a hierarchically organized combination of trusted analog building blocks. To minimize the setup burden: no topology selection rules or abstract behaviors need to be specified, and performance calculations are SPICE-based. The search algorithm is a novel multi-objective evolutionary algorithm that uses an age-layered population structure to balance exploration vs. exploitation. Results are shown for a space having 3528 one- and two-stage operational amplifier topologies.