GPCAD: a tool for CMOS op-amp synthesis
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
MAELSTROM: efficient simulation-based synthesis for custom analog cells
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Proceedings of the 37th Annual Design Automation Conference
CLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells
ACM Transactions on Design Automation of Electronic Systems (TODAES)
ASF: a practical simulation-based methodology for the synthesis of custom analog circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Simulated Annealing Algorithm with Multi-Molecule: An Approach to Analog Synthesis
EDTC '96 Proceedings of the 1996 European conference on Design and Test
Design of high performance two stage CMOS cascode op-amps with stable biasing
VLSID '96 Proceedings of the 9th International Conference on VLSI Design: VLSI in Mobile Communication
Top-down heterogeneous synthesis of analog and mixed-signal systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies
Proceedings of the 44th annual Design Automation Conference
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Topology synthesis of analog circuits based on adaptively generated building blocks
Proceedings of the 45th annual Design Automation Conference
ICES '08 Proceedings of the 8th international conference on Evolvable Systems: From Biology to Hardware
ANTIGONE: Top-down creation of analog-to-digital converter architectures
Integration, the VLSI Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Massively multi-topology sizing of analog integrated circuits
Proceedings of the Conference on Design, Automation and Test in Europe
A geometric programming aided knowledge based approach for analog circuit synthesis and sizing
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation
Proceedings of the 14th annual conference on Genetic and evolutionary computation
Operating-point driven formulation for analog computer-aided design
Analog Integrated Circuits and Signal Processing
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design
Proceedings of the Conference on Design, Automation and Test in Europe
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A new approach to cell-level analog circuit synthesis is presented. This approach formulates analog synthesis as a Mixed-Integer Nonlinear Programming (MINLP) problem in order to allow simultaneous topology and parameter selection. Topology choices are represented as binary integer variables and design parameters (e.g., device sizes and bias voltages) as continuous variables. Examples using a Branch and Bound method to efficiently solve the MINLP problem for CMOS two-stage op amps are given