Genetic programming: on the programming of computers by means of natural selection
Genetic programming: on the programming of computers by means of natural selection
ARCHGEN: automated synthesis of analog systems
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Analog compilation based on successive decompositions
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Genetic Programming III: Darwinian Invention & Problem Solving
Genetic Programming III: Darwinian Invention & Problem Solving
Evolutionary Electronics: Automatic Design of Electronic Circuits and Systems by Genetic Algorithms
Evolutionary Electronics: Automatic Design of Electronic Circuits and Systems by Genetic Algorithms
A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits
A Computer-Aided Design and Synthesis Environment for Analog Integrated Circuits
DAISY: a simulation-based high-level synthesis tool for ΔΣ modulators
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Computational Statistics & Data Analysis - Nonlinear methods and data mining
Automated Analog Circuit Sythesis Using a Linear Representation
ICES '98 Proceedings of the Second International Conference on Evolvable Systems: From Biology to Hardware
Automated Design of Analog Circuits Using Cell-Based Structure
EH '02 Proceedings of the 2002 NASA/DoD Conference on Evolvable Hardware (EH'02)
Evolving analog circuits by variable length chromosomes
Advances in evolutionary computing
Genetic Programming IV: Routine Human-Competitive Machine Intelligence
Genetic Programming IV: Routine Human-Competitive Machine Intelligence
HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Performance space modeling for hierarchical synthesis of analog integrated circuits
Proceedings of the 42nd annual Design Automation Conference
An approach to topology synthesis of analog circuits using hierarchical blocks and symbolic analysis
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
ALPS: the age-layered population structure for reducing the problem of premature convergence
Proceedings of the 8th annual conference on Genetic and evolutionary computation
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Proceedings of the 43rd annual Design Automation Conference
Representations for Genetic and Evolutionary Algorithms
Representations for Genetic and Evolutionary Algorithms
Proceedings of the conference on Design, automation and test in Europe
Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Topology synthesis of analog circuits based on adaptively generated building blocks
Proceedings of the 45th annual Design Automation Conference
Automated extraction of expert knowledge in analog topology selection and sizing
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Importance sampled circuit learning ensembles for robust analog IC design
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Analog Design Centering and Sizing
Analog Design Centering and Sizing
High-Level Modeling and Synthesis of Analog Integrated Systems
High-Level Modeling and Synthesis of Analog Integrated Systems
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
Massively multi-topology sizing of analog integrated circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Automated synthesis of analog electrical circuits by means ofgenetic programming
IEEE Transactions on Evolutionary Computation
Evolutionary programming made faster
IEEE Transactions on Evolutionary Computation
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
A synthesis system for analog circuits based on evolutionary search and topological reuse
IEEE Transactions on Evolutionary Computation
Analog Genetic Encoding for the Evolution of Circuits and Networks
IEEE Transactions on Evolutionary Computation
Algorithm-driven synthesis of data conversion architectures
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The invention of CMOS amplifiers using genetic programming and current-flow analysis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Exploration-based high-level synthesis of linear analog systems operating at low/medium frequencies
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Integer programming based topology selection of cell-level analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Pareto sampling: choosing the right weights by derivative pursuit
Proceedings of the 47th Design Automation Conference
Operating-point driven formulation for analog computer-aided design
Analog Integrated Circuits and Signal Processing
ITRS 2011 analog EDA challenges and approaches
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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This paper presents MOJITO-R, a tool that performs variation-aware structural synthesis of analog circuits. It returns trustworthy topologies by searching across a space of thousands of possible topologies defined by hierarchically organized analog structural building blocks. "Structural homotopy" conducts search at several objective-function tightening levels (numbers of process corners) simultaneously. Multiobjective evolutionary search returns sized topologies which trade off power, area, performances, and yield. An experimental validation run returned 78 643 Pareto-optimal designs, having 982 sized topologies with various specification/yield combinations. A decision tree is extracted to visualize the performance-topology relationship.