An efficient DC root solving algorithm with guaranteed convergence for analog integrated CMOS circuits

Efficient analog circuit synthesis with simultaneous yield and robustness optimization

Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design

An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits

Proceedings of the 39th annual Design Automation Conference

Simulation-based automatic generation of signomial and posynomial performance models for analog integrated circuit sizing

Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design

Synthesis of analog and mixed-signal integrated electronic circuits

Formal engineering design synthesis

Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines

Proceedings of the conference on Design, automation and test in Europe - Volume 1

Generalized Posynomial Performance Modeling

DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1

Efficient Multiobjective Synthesis of Analog Circuits using Hierarchical Pareto-Optimal Performance Hypersurfaces

Proceedings of the conference on Design, Automation and Test in Europe - Volume 2

CAFFEINE: Template-Free Symbolic Model Generation of Analog Circuits via Canonical Form Functions and Genetic Programming

Proceedings of the conference on Design, Automation and Test in Europe - Volume 2

COSMO: a correlation sensitive mutation operator for multi-objective optimization

Proceedings of the 9th annual conference on Genetic and evolutionary computation

Automatic DC operating point computation and design plan generation for analog IPs

Analog Integrated Circuits and Signal Processing

Template-free symbolic performance modeling of analog circuits via canonical-form functions and genetic programming

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Variation-aware structural synthesis of analog circuits via hierarchical building blocks and structural homotopy

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

A new approach to sizing analog CMOS building blocks using pre-compiled neural network models

Analog Integrated Circuits and Signal Processing

Operating-point driven formulation for analog computer-aided design

Analog Integrated Circuits and Signal Processing