Efficient analog circuit synthesis with simultaneous yield and robustness optimization

  • Authors:
  • Geert Debyser;Georges Gielen

  • Affiliations:
  • Katholieke Universiteit Leuven, Belgium;Katholieke Universiteit Leuven, Belgium

  • Venue:
  • Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
  • Year:
  • 1998

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Abstract