Efficient analog circuit synthesis with simultaneous yield and robustness optimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Computer Methods for Circuit Analysis and Design
Computer Methods for Circuit Analysis and Design
Multifrequency Analysis of Faults in Analog Circuits
IEEE Design & Test
Canonical symbolic analysis of large analog circuits with determinant decision diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hierarchical symbolic analysis of analog integrated circuits via determinant decision diagrams
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
ISVLSI '05 Proceedings of the IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design
Proceedings of the conference on Design, automation and test in Europe: Proceedings
A survey on binary decision diagram approaches to symbolic analysis of analog integrated circuits
Analog Integrated Circuits and Signal Processing
A size sensitivity method for interactive CMOS circuit sizing
Analog Integrated Circuits and Signal Processing
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This paper presents a new method to perform efficient first-order symbolic sensitivity analysis of analog circuits by direct differentiation of symbolic expressions stored as element-coefficient diagrams (ECDs). An ECD is a compact graphical representation of a symbolic transfer function. It is the cancellation-free and per-coefficient term generation version of determinant decision diagrams (DDDs). The symbolic sensitivity equations obtained from ECDs are stored as a sensitivity-ECDs(SECDs) and can be evaluated extremely fast as it inherits the properties of ECDs. The proposed methodology has been applied to the calculation of sensitivities of four benchmark circuits and it has been demonstrated to be as accurate and more efficient than numerical sensitivity analysis done by SPECTRE.