Efficient analog circuit synthesis with simultaneous yield and robustness optimization
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Proceedings of the 38th annual Design Automation Conference
Response Surface Methodology: Process and Product in Optimization Using Designed Experiments
Response Surface Methodology: Process and Product in Optimization Using Designed Experiments
Convex Optimization
Asymptotic probability extraction for non-normal distributions of circuit performance
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Projection-based performance modeling for inter/intra-die variations
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 44th annual Design Automation Conference
Principle Hessian direction based parameter reduction with process variation
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Proceedings of the 45th annual Design Automation Conference
Application-specific worst case corners using response surfaces and statistical models
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Worst-case analysis and optimization of VLSI circuit performances
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A resilience roadmap: (invited paper)
Proceedings of the Conference on Design, Automation and Test in Europe
Efficient SRAM failure rate prediction via Gibbs sampling
Proceedings of the 48th Design Automation Conference
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While statistical analysis has been considered as an important tool for nanoscale integrated circuit design, many IC designers would like to know the design-specific worst-case corners for circuit debugging and failure diagnosis. In this paper, we propose a novel algorithm to efficiently extract the worst-case corners for nanoscale ICs. Our proposed approach mathematically formulates a quadratically constrained quadratic programming (QCQP) problem for corner extraction. Next, it applies the Lagrange duality theory to convert the non-convex QCQP problem to a convex semi-definite programming (SDP) problem that is easier to solve. Our circuit example designed in a commercial CMOS process demonstrates that the proposed SDP formulation can find the worst-case corners both efficiently and robustly, while the traditional QCQP fails to achieve global convergence.