An efficient optimization--based technique to generate posynomial performance models for analog integrated circuits

  • Authors:
  • Walter Daems;Georges Gielen;Willy Sansen

  • Affiliations:
  • K.U.Leuven, ESAT-MICAS, Leuven, Belgium;K.U.Leuven, ESAT-MICAS, Leuven, Belgium;K.U.Leuven, ESAT-MICAS, Leuven, Belgium

  • Venue:
  • Proceedings of the 39th annual Design Automation Conference
  • Year:
  • 2002

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Abstract

This paper presents an new direct--fitting method to generate posynomial response surface models with arbitrary constant exponents for linear and nonlinear performance parameters of analog integrated circuits. Posynomial models enable the use of efficient geometric programming techniques for circuit sizing and optimization. The automatic generation avoids the time--consuming nature and inaccuracies of handcrafted analytic model generation. The technique is based on the fitting of posynomial model templates to numerical data from SPICE simulations. Attention is paid to estimating the relative `goodness--of--fit' of the generated models. Experimental results illustrate the significantly better accuracy of the new approach.