DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
DATE '00 Proceedings of the conference on Design, automation and test in Europe
Proceedings of the 39th annual Design Automation Conference
Generalized Posynomial Performance Modeling
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Robust analog/RF circuit design with projection-based posynomial modeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Performance-centering optimization for system-level analog design exploration
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Top-down heterogeneous synthesis of analog and mixed-signal systems
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Device-circuit co-optimization for mixed-mode circuit design via geometric programming
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Automated extraction of expert knowledge in analog topology selection and sizing
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
AHS '09 Proceedings of the 2009 NASA/ESA Conference on Adaptive Hardware and Systems
Integer programming based topology selection of cell-level analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Constraint-Based Layout-Driven Sizing of Analog Circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Hi-index | 0.00 |
This paper presents an agile hierarchical synthesis framework for analog circuit. To acknowledge the limitation for a given topology analog circuit, this hierarchical synthesis work proposes a performance exploration technique and a non-uniform-step simulation process. Apart from spec targeted designs, this proposed approach can help to search the solutions better than designers' expectation. A parallel genetic algorithm (PAGE) method is employed for performance exploration. Unlike other evolution-based topology explorations, this is the first method that regards performance constraints as input genome for evolution and resolves the multiple-objective problem with the multiple-population feature. Populations of selected performance are transfered to device variables by re-targeting technique. Based on a normalization of device variable distribution, a probabilistic stochastic simulation significantly reduces the convergence time to find the global optima of circuit performance. Experimental results show that our approach on radio-frequency distributed amplifier (RFDA) and folded cascode operational amplifier (Op-Amp) in different technologies can obtain better runtime and higher quality in analog synthesis.