Proceedings of the 38th annual Design Automation Conference
Design of pipeline analog-to-digital converters via geometric programming
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Performance trade-off analysis of analog circuits by normal-boundary intersection
Proceedings of the 40th annual Design Automation Conference
Efficient description of the design space of analog circuits
Proceedings of the 40th annual Design Automation Conference
Phase-Locking in High-Performance Systems: From Devices to Architectures
Phase-Locking in High-Performance Systems: From Devices to Architectures
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Robust analog/RF circuit design with projection-based posynomial modeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal design of a CMOS op-amp via geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
AMGIE-A synthesis environment for CMOS analog integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A CPPLL hierarchical optimization methodology considering jitter, power and locking time
Proceedings of the 43rd annual Design Automation Conference
Platform-based mixed signal design: Optimizing a high-performance pipelined ADC
Analog Integrated Circuits and Signal Processing
Robust system level design with analog platforms
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Design automation for analog: the next generation of tool challenges
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Statistical performance modeling and optimization
Foundations and Trends in Electronic Design Automation
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
A platform-based methodology for system-level mixed-signal design
EURASIP Journal on Embedded Systems - Special issue on design methodologies and innovative architectures for mixed-signal embedded systems
Proceedings of the Conference on Design, Automation and Test in Europe
PAGE: parallel agile genetic exploration towards utmost performance for analog circuit design
Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper we propose a novel analog design optimization methodology to address two key aspects of top-down system-level design: (1) how to optimally compare and select analog system architectures in the early phases of design; and (2) how to hierarchically propagate performance specifications from system level to circuit level to enable independent circuit block design. Importantly, due to the inaccuracy of early-stage system-level models, and the increasing magnitude of process and environmental variations, the system-level exploration must leave sufficient design margin to ensure a successful late-stage implementation. Therefore, instead of minimizing a design objective function, and thereby converging on a constraint boundary, we apply a novel performance centering optimization. Our proposed methodology centers the analog design in the performance space, and maximizes the distance to all constraint boundaries. We demonstrate that this early-stage design margin, which is measured by the volume of the inscribed ellipsoid lying inside the performance constraints, provides an excellent quality measure for comparing different system architectures. The efficacy of our performance centering approach is shown for analog design examples, including a complete clock data recovery system design and implementation.