Performance trade-off analysis of analog circuits by normal-boundary intersection
Proceedings of the 40th annual Design Automation Conference
A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A combined feasibility and performance macromodel for analog circuits
Proceedings of the 42nd annual Design Automation Conference
Deterministic approaches to analog performance space exploration (PSE)
Proceedings of the 42nd annual Design Automation Conference
Performance space modeling for hierarchical synthesis of analog integrated circuits
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
An elitist distributed particle swarm algorithm for RF IC optimization
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration
GLSVLSI '06 Proceedings of the 16th ACM Great Lakes symposium on VLSI
Performance-centering optimization for system-level analog design exploration
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
A CPPLL hierarchical optimization methodology considering jitter, power and locking time
Proceedings of the 43rd annual Design Automation Conference
Power constrained design optimization of analog circuits based on physical gm/ID characteristics
SBCCI '06 Proceedings of the 19th annual symposium on Integrated circuits and systems design
Automation in mixed-signal design: challenges and solutions in the wake of the nano era
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Analog Integrated Circuits and Signal Processing
Simulation-based reusable posynomial models for MOS transistor parameters
Proceedings of the conference on Design, automation and test in Europe
Proceedings of the conference on Design, automation and test in Europe
Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies
Proceedings of the 44th annual Design Automation Conference
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Narrow-band low-noise amplifier synthesis for high-performance system-on-chip design
Microelectronics Journal
Proceedings of the conference on Design, automation and test in Europe
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Behavior-level yield enhancement approach for large-scaled analog circuits
Proceedings of the 47th Design Automation Conference
Computation of yield-optimized Pareto fronts for analog integrated circuit specifications
Proceedings of the Conference on Design, Automation and Test in Europe
Massively multi-topology sizing of analog integrated circuits
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the Conference on Design, Automation and Test in Europe
A fast heuristic approach for parametric yield enhancement of analog designs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
Analog Integrated Circuits and Signal Processing
Operating-point driven formulation for analog computer-aided design
Analog Integrated Circuits and Signal Processing
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A new method is described which gives the designer access to the design space boundaries of a circuit topology, all with transistor-level accuracy. Using multiobjective genetic optimization, the hypersurface of Pareto-optimal design points is calculated. Tradeoff analysis of competing performances at the design space boundaries is made possible by the application of multivariate regression techniques. This new methodology is illustrated with the presentation of the design space for two different types of circuits: a Miller-compensated operational transconductance amplifier and an LC-tank voltage-controlled oscillator.