Enhanced simulated annealing for globally minimizing functions of many-continuous variables
ACM Transactions on Mathematical Software (TOMS)
GPCAD: a tool for CMOS op-amp synthesis
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
Optimization of inductor circuits via geometric programming
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
An Introduction to Genetic Algorithms
An Introduction to Genetic Algorithms
An intelligent design system for analogue integrated circuits
EURO-DAC '90 Proceedings of the conference on European design automation
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Generalized Posynomial Performance Modeling
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Robust analog/RF circuit design with projection-based posynomial modeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Proceedings of the 43rd annual Design Automation Conference
CMOS op-amp sizing using a geometric programming formulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A power optimization method for CMOS op-amps using sub-space based geometric programming
Proceedings of the Conference on Design, Automation and Test in Europe
Convex piecewise-linear modeling method for circuit optimization via geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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We present an algorithm to automatically design posynomial models for parameters of the MOS transistors using simulation data. These models improve the accuracy of the Geometric Programming flow for automatic circuit sizing. The models are reusable for multiple circuits on a given Silicon technology and hence don't adversely affect the scalability of the Geometric Programming approach. The proposed method is a combination of genetic algorithms and Quadratic Programming. It is the only approach for posynomial modeling with real-valued exponents which is easily extensible to different error metrics. We compare the proposed technique with state-of-art posynomial/monomial modeling techniques and show its superiority.