NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO

Authors:
Min Chu;David J. Allstot;Jeffrey M. Huard;Kim Y. Wong
Affiliations:
University of Washington, Seattle, WA;University of Washington, Seattle, WA;National Semiconductor Corporation, Federal Way, WA;National Semiconductor Corporation, Federal Way, WA
Venue:
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Year:
2004

Citing 4
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Abstract

A parasitic-aware RF synthesis tool based on a non-dominated sorting genetic algorithm (NSGA) is introduced. The NSGA-based optimizer casts the design problem as a mulit-objective optimization problem and offers multiple solutions along the Pareto optimal front. Monte-Carlo simulations are then performed to efficiently assess sensitivity at solution points with respect to process, voltage, and temperature (PVT) variations. An example design of a 10mW 5GHz voltage-controlled oscillator (VCO) in 250nm SiGe BiCMOS achieves a 12% tuning range with a phase noise of - 133dBc/Hz at 3MHz offset. The Figure-of-Merit (FOM) is 188dBc/Hz and power-frequency-tuning normalized FOM (PFTN-FOM) is -4dB.