Global design of analog cells using statistical optimization techniques
Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
Genetic algorithms + data structures = evolution programs (3rd ed.)
Genetic algorithms + data structures = evolution programs (3rd ed.)
Multi-Objective Optimization Using Evolutionary Algorithms
Multi-Objective Optimization Using Evolutionary Algorithms
NSGA-based parasitic-aware optimization of a 5GHz low-noise VCO
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Differential Evolution: A Practical Approach to Global Optimization (Natural Computing Series)
Differential Evolution: A Practical Approach to Global Optimization (Natural Computing Series)
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Analog Integrated Circuits and Signal Processing
A memetic approach to the automatic design of high-performance analog integrated circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Analog circuits optimization based on evolutionary computation techniques
Integration, the VLSI Journal
Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm
Integration, the VLSI Journal
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
An evolutionary approach to automatic synthesis of high-performance analog integrated circuits
IEEE Transactions on Evolutionary Computation
MOEA/D: A Multiobjective Evolutionary Algorithm Based on Decomposition
IEEE Transactions on Evolutionary Computation
Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Integrated Layout-Synthesis Approach for Analog ICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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The use of Pareto-optimal performance fronts in emerging design methodologies for analog integrated circuits is a keystone to overcome the limitations of traditional design methodologies. However, most techniques to generate the fronts reported so far neglect the effect that the surrounding circuitry (such as the load impedance) has on the Pareto-front, thereby making it only realistic for the context where the front was generated. This strongly limits the use of the Pareto front because of the strong dependence between the key performances of an analog circuit and its surrounding circuitry, but, more importantly, because this circuitry remains unknown until the Pareto-optimal front is being used. Since performance front generation is a costly process, this paper proposes that performance fronts for a new context of use of a given circuit can be obtained from fronts that were previously generated under some different conditions. Towards this goal, a transformation methodology for performance objectives of operational amplifiers has been developed. Experimental results for a folded-cascode and a Miller-compensated operational amplifiers show that this is a promising approach to reuse the fronts in multiple contexts.