Global design of analog cells using statistical optimization techniques
Analog Integrated Circuits and Signal Processing - Special issue on analog signal processing
Electronic circuits: analysis, simulation, and design
Electronic circuits: analysis, simulation, and design
Parallel recombinative simulated annealing: a genetic algorithm
Parallel Computing
MAELSTROM: efficient simulation-based synthesis for custom analog cells
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A Methodology to Parallel the Temperature Cycle in Simulated Annealing
MICAI '00 Proceedings of the Mexican International Conference on Artificial Intelligence: Advances in Artificial Intelligence
Design of pipeline analog-to-digital converters via geometric programming
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Introduction to Evolutionary Computing
Introduction to Evolutionary Computing
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Analog circuit optimization system based on hybrid evolutionary algorithms
Integration, the VLSI Journal
A Sigma-Delta ADC design automation tool with embedded performance estimator
Integration, the VLSI Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Analog circuits optimization based on evolutionary computation techniques
Integration, the VLSI Journal
An evolutionary approach to automatic synthesis of high-performance analog integrated circuits
IEEE Transactions on Evolutionary Computation
IEEE Transactions on Evolutionary Computation
Very fast simulated re-annealing
Mathematical and Computer Modelling: An International Journal
Synthesis of high-performance analog circuits in ASTRX/OBLX
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
BLADES: an artificial intelligence approach to analog circuit design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
OASYS: a framework for analog circuit synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
OPASYN: a compiler for CMOS operational amplifiers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DELIGHT.SPICE: an optimization-based system for the design of integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal design of a CMOS op-amp via geometric programming
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
CMOS op-amp sizing using a geometric programming formulation
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
AMGIE-A synthesis environment for CMOS analog integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Robust Analog/RF Circuit Design With Projection-Based Performance Modeling
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
An Integrated Layout-Synthesis Approach for Analog ICs
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
The Sizing Rules Method for CMOS and Bipolar Analog Integrated Circuit Synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
Analog Integrated Circuits and Signal Processing
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This paper presents a simulation-based analog circuit synthesis methodology. Simulation-based approach is preferred so that the synthesizer, SACSES, is topology independent and requires minimal user effort. We argue that both the simulator and the search algorithm have to be optimized for analog circuit synthesis. In this regard, instead of using a commercially available simulator, an accelerated simulator, SPASE, is implemented. Various acceleration mechanisms for DC, AC and noise simulation are discussed. For example, it is shown that taking the previous DC solution as the starting point of the next DC analysis more than halves the number of iteration required for convergence. A modified version of self-adaptive evolutionary strategies, which incorporates the Metropolis criterion in the selection mechanism, is used as the search algorithm. Smooth penalty mechanisms for biasing constraints are proposed and embedded in the algorithm. Usefulness of the tool is validated by three synthesis examples.