Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Performance space modeling for hierarchical synthesis of analog integrated circuits
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
ICARIS '08 Proceedings of the 7th international conference on Artificial Immune Systems
ANTIGONE: Top-down creation of analog-to-digital converter architectures
Integration, the VLSI Journal
Analog circuit optimization system based on hybrid evolutionary algorithms
Integration, the VLSI Journal
Journal of Global Optimization
A memetic approach to the automatic design of high-performance analog integrated circuits
ACM Transactions on Design Automation of Electronic Systems (TODAES)
FUGA: a fuzzy-genetic analog circuit optimization kernel
Proceedings of the 11th Annual conference on Genetic and evolutionary computation
Proceedings of the 2007 EvoWorkshops 2007 on EvoCoMnet, EvoFIN, EvoIASP,EvoINTERACTION, EvoMUSART, EvoSTOC and EvoTransLog: Applications of Evolutionary Computing
Analog circuits optimization based on evolutionary computation techniques
Integration, the VLSI Journal
Optimising variability tolerant standard cell libraries
CEC'09 Proceedings of the Eleventh conference on Congress on Evolutionary Computation
Partitioned incremental evolution of hardware using genetic programming
EuroGP'08 Proceedings of the 11th European conference on Genetic programming
A graph grammar based approach to automated multi-objective analog circuit design
Proceedings of the Conference on Design, Automation and Test in Europe
Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm
Integration, the VLSI Journal
Optimal OpAmp sizing based on a fuzzy-genetic kernel
Proceedings of the 13th annual conference companion on Genetic and evolutionary computation
A new approach to sizing analog CMOS building blocks using pre-compiled neural network models
Analog Integrated Circuits and Signal Processing
GENOM-POF: multi-objective evolutionary synthesis of analog ICs with corners validation
Proceedings of the 14th annual conference on Genetic and evolutionary computation
Context-dependent transformation of Pareto-optimal performance fronts of operational amplifiers
Analog Integrated Circuits and Signal Processing
Analog Integrated Circuits and Signal Processing
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This paper presents an analog integrated circuit synthesis system based on an evolutionary approach. The system contains several novel features. One of these is the high-performance optimization algorithm, which is a combination of evolutionary strategies and simulated annealing. Modeling of dc parameters is done via a fast dc simulator developed for this purpose whereas modeling of ac parameters can be done either with user-defined equations or with neural-fuzzy performance models trained from SPICE simulations. Another novel feature of the system is the incorporation of matching properties of devices. This way, the optimized circuit becomes tolerant to process variations. The synthesis system has been tested on several independent examples and synthesized circuits have been verified functionally with SPICE simulations. Finally, a prototype chip composed of the three examples has been manufactured. The measurement results have demonstrated the validity of the synthesis system on silicon.