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Analog Integrated Circuits and Signal Processing - Special issue: modeling and simulation of mixed analog-digital systems
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MAELSTROM: efficient simulation-based synthesis for custom analog cells
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
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Proceedings of the 38th annual Design Automation Conference
Remembrance of circuits past: macromodeling by data mining in large analog design spaces
Proceedings of the 39th annual Design Automation Conference
Analog Device-Level Layout Automation
Analog Device-Level Layout Automation
Symbolic Analysis for Automated Design of Analog Integrated Circuits
Symbolic Analysis for Automated Design of Analog Integrated Circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A layout-aware synthesis methodology for RF circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Design of pipeline analog-to-digital converters via geometric programming
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Proceedings of the 40th annual Design Automation Conference
Piecewise polynomial nonlinear model reduction
Proceedings of the 40th annual Design Automation Conference
Performance trade-off analysis of analog circuits by normal-boundary intersection
Proceedings of the 40th annual Design Automation Conference
Support vector machines for analog circuit performance representation
Proceedings of the 40th annual Design Automation Conference
Multiobjective evolutionary algorithms: classifications, analyses, and new innovations
Multiobjective evolutionary algorithms: classifications, analyses, and new innovations
Performance Modeling of Analog Integrated Circuits Using Least-Squares Support Vector Machines
Proceedings of the conference on Design, automation and test in Europe - Volume 1
A two-layer library-based approach to synthesis of analog systems from VHDL-AMS specifications
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fast and accurate parasitic capacitance models for layout-aware
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A synthesis flow toward fast parasitic closure for radio-frequency integrated circuits
Proceedings of the 41st annual Design Automation Conference
Analog Macromodeling using Kernel Methods
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
HOLMES: Capturing the Yield-Optimized Design Space Boundaries of Analog and RF Integrated Circuits
DATE '03 Proceedings of the conference on Design, Automation and Test in Europe - Volume 1
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Comparison of Multiobjective Evolutionary Algorithms: Empirical Results
Evolutionary Computation
An evolutionary approach to automatic synthesis of high-performance analog integrated circuits
IEEE Transactions on Evolutionary Computation
AMGIE-A synthesis environment for CMOS analog integrated circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Extraction and use of neural network models in automated synthesis of operational amplifiers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
WATSON: design space boundary exploration and model generation for analog and RFIC design
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 43rd annual Design Automation Conference
Design automation for analog: the next generation of tool challenges
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Analog Integrated Circuits and Signal Processing
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High abstraction level CAD tool implementation of MOS drain current models
Microelectronics Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Probabilistic delay budget assignment for synthesis of soft real-time applications
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Modeling and design of CMOS analog circuits through hierarchical abstraction
Integration, the VLSI Journal
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Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient methods that can handle design hierarchy, in terms of both performance estimation and hierarchical design optimization method. This paper discusses and compares recent developments in this area, with special emphasis on automated modeling and on multi-objective bottom-up hierarchical design.