Statistical performance modeling and optimization
Foundations and Trends in Electronic Design Automation
Adaptive post-silicon tuning for analog circuits: concept, analysis and optimization
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A merged RF CMOS LNA-Mixer design using geometric programming
Proceedings of the 22nd Annual Symposium on Integrated Circuits and System Design: Chip on the Dunes
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Behavior-level yield enhancement approach for large-scaled analog circuits
Proceedings of the 47th Design Automation Conference
Simulation-based analog and RF circuit synthesis using a modified evolutionary strategies algorithm
Integration, the VLSI Journal
An algorithm for exploiting modeling error statistics to enable robust analog optimization
Proceedings of the International Conference on Computer-Aided Design
A fast heuristic approach for parametric yield enhancement of analog designs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Efficient parametric yield estimation of analog/mixed-signal circuits via Bayesian model fusion
Proceedings of the International Conference on Computer-Aided Design
Proceedings of the 50th Annual Design Automation Conference
Yield optimization for radio frequency receiver at system level
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, a robust analog design (ROAD) tool for post-tuning (i.e., locally optimizing) analog/RF circuits is proposed. Starting from an initial design derived from hand analysis or analog circuit optimization based on simplified models, ROAD extracts accurate performance models via transistor-level simulation and iteratively improves the circuit performance by a sequence of geometric programming steps. Importantly, ROAD sets up all design constraints to include large-scale process and environmental variations, thereby facilitating the tradeoff between yield and performance. A crucial component of ROAD is a novel projection-based scheme for quadratic (both polynomial and posynomial) performance modeling, which allows our approach to scale well to large problem sizes. A key feature of this projection-based scheme is a new implicit power iteration algorithm to find the optimal projection space and extract the unknown model coefficients with robust convergence. The efficacy of ROAD is demonstrated on several circuit examples