Deterministic approaches to analog performance space exploration (PSE)

  • Authors:
  • Daniel Mueller;Guido Stehr;Helmut Graeb;Ulf Schlichtmann

  • Affiliations:
  • Techn. Univ. Muenchen, Munich, Germany;Techn. Univ. Muenchen, Munich, Germany;Techn. Univ. Muenchen, Munich, Germany;Techn. Univ. Muenchen, Munich, Germany

  • Venue:
  • Proceedings of the 42nd annual Design Automation Conference
  • Year:
  • 2005

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Abstract

Performance space exploration (PSE) determines the range of feasible performance values of a circuit block for a given topology and technology. In this paper, we present two deterministic approaches for PSE. One approximates the feasible performance space based on linearized circuit models and is suitable for investigating a large number of performances. The other one computes discretizations of the Pareto front of competing performances. In addition, a motivation and application of PSE using a hierarchical design example is presented.