A power estimation model for high-speed CMOS A/D converters
DATE '99 Proceedings of the conference on Design, automation and test in Europe
DAISY: a simulation-based high-level synthesis tool for ΔΣ modulators
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
A combined feasibility and performance macromodel for analog circuits
Proceedings of the 42nd annual Design Automation Conference
Deterministic approaches to analog performance space exploration (PSE)
Proceedings of the 42nd annual Design Automation Conference
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
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A method for the architectural selection of analog to digital (A/D) converters based on a generic figure of merit is described. First a figure of merit for the power consumption is introduced. This figure of merit includes both target specifications and technology data and has five generic parameters. The values of these generic parameters can be estimated by analyzing the different converter structures or by means of a fitting procedure using data from published designs. It is shown that the generic parameters have different values for different types of converters. Therefore the trade-off between speed, resolution, power dissipation and technology parameters depends on the type of converter. It is shown that the calculated figures of merit of the published designs, together with the calculated global trade-off comprise a surface in the (5 dimensional) design space. This surface makes it possible to accurately predict the power consumption and select the best converter solution for a certain target application. This can then serve as a first step in data converter synthesis or as a power estimator during high-level system design exploration.