Practical methods of optimization; (2nd ed.)
Practical methods of optimization; (2nd ed.)
How to make efficient communication, collaboration, and optimization from system to chip
Proceedings of the 40th annual Design Automation Conference
Performance trade-off analysis of analog circuits by normal-boundary intersection
Proceedings of the 40th annual Design Automation Conference
Deterministic approaches to analog performance space exploration (PSE)
Proceedings of the 42nd annual Design Automation Conference
Multiobjective Evolutionary Algorithms: Analyzing the State-of-the-Art
Evolutionary Computation
A CPPLL hierarchical optimization methodology considering jitter, power and locking time
Proceedings of the 43rd annual Design Automation Conference
Generation of yield-aware Pareto surfaces for hierarchical circuit design space exploration
Proceedings of the 43rd annual Design Automation Conference
Pareto-Front Computation and Automatic Sizing of CPPLLs
ISQED '07 Proceedings of the 8th International Symposium on Quality Electronic Design
Proceedings of the conference on Design, automation and test in Europe
Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies
Proceedings of the 44th annual Design Automation Conference
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
A fast and elitist multiobjective genetic algorithm: NSGA-II
IEEE Transactions on Evolutionary Computation
Generation of yield-embedded Pareto-front for simultaneous optimization of yield and performances
Proceedings of the 47th Design Automation Conference
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This paper presents a new method using multi-objective optimization algorithm to automatically find the best solution from a topology library of analog circuits. Firstly this method abstracts the Pareto-front of each topology in the library by SPICE simulation. Then, the Pareto-front of the topology library is abstracted from the Pareto-fronts of topologies in the library followed by the theorem we proved. The best solution which is defined as the nearest point to specification on the Pareto-front of the topology library is then calculated by the equations derived from collinearity theorem. After the local searching using Nelder-Mead method maps the calculated best solution back to design variable space, the non-dominated best solution is obtained. Comparing to the optimization methods using single-objective optimization algorithms, this work can efficiently find the best non-dominated solution from multiple topologies for different specifications without additional time-consuming optimizing iterations. The experiments demonstrate that this method is feasible and practical in actual analog designs especially for uncertain or different multidimensional specifications.