Bayesian model fusion: a statistical framework for efficient pre-silicon validation and post-silicon tuning of complex analog and mixed-signal circuits

Authors:
Xin Li;Fa Wang;Shupeng Sun;Chenjie Gu
Affiliations:
Carnegie Mellon University, Pittsburgh, PA;Carnegie Mellon University, Pittsburgh, PA;Carnegie Mellon University, Pittsburgh, PA;Strategic CAD Labs, Intel Corporation, Hillsboro, OR
Venue:
Proceedings of the International Conference on Computer-Aided Design
Year:
2013

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Abstract

In this paper, we describe a novel statistical framework, referred to as Bayesian Model Fusion (BMF), that allows us to minimize the simulation and/or measurement cost for both pre-silicon validation and post-silicon tuning of analog and mixed-signal (AMS) circuits with consideration of large-scale process variations. The BMF technique is motivated by the fact that today's AMS design cycle typically spans multiple stages (e.g., schematic design, layout design, first tape-out, second tape-out, etc.). Hence, we can reuse the simulation and/or measurement data collected at an early stage to facilitate efficient validation and tuning of AMS circuits with a minimal amount of data at the late stage. The efficacy of BMF is demonstrated by using several industrial circuit examples.