COSMOS: a compiled simulator for MOS circuits
DAC '87 Proceedings of the 24th ACM/IEEE Design Automation Conference
Learning internal representations by error propagation
Parallel distributed processing: explorations in the microstructure of cognition, vol. 1
Information-based objective functions for active data selection
Neural Computation
Feasibility and performance region modeling of analog and digital circuits
Analog Integrated Circuits and Signal Processing - Special issue: modeling and simulation of mixed analog-digital systems
Extracting rules from neural networks by pruning and hidden-unit splitting
Neural Computation
Advanced compiler design and implementation
Advanced compiler design and implementation
Hierarchical constraint transformation using directed interval search for analog system synthesis
DATE '99 Proceedings of the conference on Design, automation and test in Europe
MAELSTROM: efficient simulation-based synthesis for custom analog cells
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
High-performance hardware description language simulation: modeling issues and recommended practices
Transactions of the Society for Computer Simulation International - Special issue on parallel and distributed simulation
Continuous-time delta-sigma modulators for high-speed A/D conversion: theory, practice and fundamental performance limits
High speed A/D converters: understanding data converters through spice
High speed A/D converters: understanding data converters through spice
Active learning in neural networks
New learning paradigms in soft computing
Proceedings of the 39th annual Design Automation Conference
Remembrance of circuits past: macromodeling by data mining in large analog design spaces
Proceedings of the 39th annual Design Automation Conference
Piecewise Linear Modeling and Analysis
Piecewise Linear Modeling and Analysis
Computer Methods for Circuit Analysis and Design
Computer Methods for Circuit Analysis and Design
FERNN: An Algorithm for Fast Extraction of Rules fromNeural Networks
Applied Intelligence
Event driven simulation without loops or conditionals
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A layout-aware synthesis methodology for RF circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Optimizing VHDL Compilation for Parallel Simulation
IEEE Design & Test
Languages for system specification
Systematic development of analog circuit structural macromodels through behavioral model decoupling
Proceedings of the 42nd annual Design Automation Conference
Incremental Active Learning for Optimal Generalization
Neural Computation
Modeling nonlinear dynamics in analog circuits via root localization
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A high-level simulation and synthesis environment for ΔΣ modulators
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A hierarchical compiled code event-driven logic simulator
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A partial order for the M-of-N rule-extraction algorithm
IEEE Transactions on Neural Networks
IEEE Transactions on Neural Networks
Extracting rules from trained neural networks
IEEE Transactions on Neural Networks
On the convergence of validity interval analysis
IEEE Transactions on Neural Networks
Extraction of rules from artificial neural networks for nonlinear regression
IEEE Transactions on Neural Networks
Neural net algorithms that learn in polynomial time from examples and queries
IEEE Transactions on Neural Networks
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This paper presents a methodology for fast time-domain simulation of analog systems with nonlinear parameters. Specifically, the paper focuses on @D@S analog-to-digital converters (ADC). The method creates compiled-code simulators based on symbolic analysis. Code is optimized using loop invariant elimination and constant folding, well-known compiler optimization methods. Circuits are described as structural macromodels. Nonlinear parameters are expressed using piecewise linear (PWL) models. The paper presents a technique for automatically creating PWL models through model extraction from trained neural networks. As compared to existing behavioral simulation methods for @D@S ADC, this technique is more systematic and accurate. In our experiments, compiled-code simulation was significantly faster than numerical simulation. Hence, the methodology is very useful in analog and mixed-signal system synthesis, which is known to require a large number of simulation steps.