DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Symbolic Analysis for Automated Design of Analog Integrated Circuits
Symbolic Analysis for Automated Design of Analog Integrated Circuits
The sizing rules method for analog integrated circuit design
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
A synthesis system for analog circuits based on evolutionary search and topological reuse
IEEE Transactions on Evolutionary Computation
Topology synthesis of analog circuits based on adaptively generated building blocks
Proceedings of the 45th annual Design Automation Conference
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Fast isomorphism testing for a graph-based analog circuit synthesis framework
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
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This paper presents a method of design automation for analog circuits, focusing on topology generation and quick performance evaluation. First we describe mechanisms to generate circuit topologies with hierarchical blocks. Those blocks are specialized by adding terminal information. The connection between blocks is in compliance with a set of synthesis rules, which are extracted from typical schematics in the literature. Symbolic analysis has been used to select an appropriate topology quickly and to help the designer gain a better understanding of a circuit's behavior. Finally, experimental results show the creativity and efficiency of our method.