DARWIN: CMOS opamp synthesis by means of a genetic algorithm
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Computer-Aided Design of Analog Integrated Circuits and Systems
Computer-Aided Design of Analog Integrated Circuits and Systems
An approach to topology synthesis of analog circuits using hierarchical blocks and symbolic analysis
ASP-DAC '06 Proceedings of the 2006 Asia and South Pacific Design Automation Conference
Simultaneous multi-topology multi-objective sizing across thousands of analog circuit topologies
Proceedings of the 44th annual Design Automation Conference
Design of Analog CMOS Integrated Circuits
Design of Analog CMOS Integrated Circuits
Automated synthesis of analog electrical circuits by means ofgenetic programming
IEEE Transactions on Evolutionary Computation
A circuit representation technique for automated circuit design
IEEE Transactions on Evolutionary Computation
A synthesis system for analog circuits based on evolutionary search and topological reuse
IEEE Transactions on Evolutionary Computation
Integer programming based topology selection of cell-level analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
A graph grammar based approach to automated multi-objective analog circuit design
Proceedings of the Conference on Design, Automation and Test in Europe
Massively multi-topology sizing of analog integrated circuits
Proceedings of the Conference on Design, Automation and Test in Europe
A geometric programming aided knowledge based approach for analog circuit synthesis and sizing
Proceedings of the 21st edition of the great lakes symposium on Great lakes symposium on VLSI
An axiomatic model for concept structure description and its application to circuit design
Knowledge-Based Systems
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This paper presents an automated analog synthesis tool for topology generation and subsequent circuit sizing. Though sizing is indispensable, the paper mainly concentrates on topology generation. A new kind of GA is developed, where a fraction of the offsprings in each generation is built from building blocks or cells obtained from previous generations. The cells are stored in a hierarchically arranged library that also contains information on the preferred neighborhood of each cell. The adaptively formed cell library starts only with basic elements and gradually includes functionally useful and bigger blocks, pertinent to the design. The techniques have been applied to synthesize an operational amplifier and a ring oscillator design. Results show that with reasonable computational effort, topologies have evolved that are designer understandable.