SEA '09 Proceedings of the 8th International Symposium on Experimental Algorithms
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Effect of mismatch on the reliability of ON/OFF-programmable CNNs
IEEE Transactions on Circuits and Systems Part I: Regular Papers
A resilience roadmap: (invited paper)
Proceedings of the Conference on Design, Automation and Test in Europe
Computation of yield-optimized Pareto fronts for analog integrated circuit specifications
Proceedings of the Conference on Design, Automation and Test in Europe
Formal approaches to analog circuit verification
Proceedings of the Conference on Design, Automation and Test in Europe
Digital design at a crossroads: how to make statistical design methodologies industrially relevant
Proceedings of the Conference on Design, Automation and Test in Europe
A fast heuristic approach for parametric yield enhancement of analog designs
ACM Transactions on Design Automation of Electronic Systems (TODAES) - Special section on verification challenges in the concurrent world
Variability aware SVM macromodel based design centering of analog circuits
Analog Integrated Circuits and Signal Processing
Hierarchical sizing and biasing of analog firm intellectual properties
Integration, the VLSI Journal
Proceedings of the Conference on Design, Automation and Test in Europe
Proceedings of the 50th Annual Design Automation Conference
Reliability challenges for electric vehicles: from devices to architecture and systems software
Proceedings of the 50th Annual Design Automation Conference
A fast analog circuit yield estimation method for medium and high dimensional problems
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Yield optimization for radio frequency receiver at system level
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
ITRS 2011 analog EDA challenges and approaches
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
Analog Integrated Circuits and Signal Processing
A size sensitivity method for interactive CMOS circuit sizing
Analog Integrated Circuits and Signal Processing
Hi-index | 0.00 |
This book represents a compendium of fundamental problem formulations of analog design centering and sizing. It provides a differentiated knowledge about the tasks of analog design centering and sizing. In particular the worst-case problem will be formulated. It stands at the interface between process technology and design technology. This book wants to point out that and how both process and design technology are required for its solution. The intention is to enable analog and mixed-signal designers to assess CAD solution methods that are presented to them. On the other side, the intention is to enable developers of analog CAD tools to formulate and develop solution approaches for analog design centering and sizing. The structure of the book is geared towards a combination of a reference book and a textbook. The formulations of tasks and solution approaches by mathematical means makes the book suitable as well for students dealing with analog design and design methodology.