Analog Design Centering and Sizing
Analog Design Centering and Sizing
Proceedings of the 2009 International Conference on Computer-Aided Design
Compact Modeling of Variation in FinFET SRAM Cells
IEEE Design & Test
Exploring sub-20nm FinFET design with predictive technology models
Proceedings of the 49th Annual Design Automation Conference
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With continued scaling of CMOS technology it becomes increasingly difficult to maintain reliable circuits. Early predictive technology and design exploration help to understand major effects of variability sources and their impact on circuit performances. With each new technology basic circuit blocks have to be redesigned to appropriately evaluate the impact of technology scaling. Therefore, this paper presents an approach which is able to find the optimal sizing of basic circuit blocks considering process variation. We utilize this approach to predict the impact of scaling in FinFET technologies and the influence of process variations in future technology nodes.