Adaptation in natural and artificial systems
Adaptation in natural and artificial systems
Numerical recipes in C (2nd ed.): the art of scientific computing
Numerical recipes in C (2nd ed.): the art of scientific computing
A statistical optimization-based approach for automated sizing of analog cells
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Parallel recombinative simulated annealing: a genetic algorithm
Parallel Computing
GPCAD: a tool for CMOS op-amp synthesis
Proceedings of the 1998 IEEE/ACM international conference on Computer-aided design
MAELSTROM: efficient simulation-based synthesis for custom analog cells
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
A methodology for distributed simulation-based synthesis of custom analog circuits
A methodology for distributed simulation-based synthesis of custom analog circuits
Synthesis of high-performance analog circuits in ASTRX/OBLX
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
FASY: a fuzzy-logic based tool for analog synthesis
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Anaconda: simulation-based synthesis of analog circuits via stochastic pattern search
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Integer programming based topology selection of cell-level analog circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Remembrance of circuits past: macromodeling by data mining in large analog design spaces
Proceedings of the 39th annual Design Automation Conference
Correct-by-construction layout-centric retargeting of large analog designs
Proceedings of the 41st annual Design Automation Conference
A Framework for Designing Reusable Analog Circuits
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Robust analog/RF circuit design with projection-based posynomial modeling
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Parasitic-aware design and optimization of a fully integrated CMOS wideband amplifier
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
An 11-bit 160-MS/s 1.35-V 10-mW D/A converter using automated device sizing system
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Proceedings of the 9th annual conference on Genetic and evolutionary computation
Statistical performance modeling and optimization
Foundations and Trends in Electronic Design Automation
Classification of analog synthesis tools based on their architecture selection mechanisms
Integration, the VLSI Journal
Proceedings of the conference on Design, automation and test in Europe
Analog circuit optimization system based on hybrid evolutionary algorithms
Integration, the VLSI Journal
Proceedings of the 2007 EvoWorkshops 2007 on EvoCoMnet, EvoFIN, EvoIASP,EvoINTERACTION, EvoMUSART, EvoSTOC and EvoTransLog: Applications of Evolutionary Computing
Design of parasitic and process-variation aware nano-CMOS RF circuits: a VCO case study
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the Conference on Design, Automation and Test in Europe
Hierarchical sizing and biasing of analog firm intellectual properties
Integration, the VLSI Journal
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This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufacturing process. To manage complexity and time-to-market, SoC designs require a high level of automation and reuse. Digital methodologies are inapplicable to analog IP, which relies on tight control of low-level device and circuit properties that vary widely across manufacturing processes. This analog synthesis solution automates these tedious, technology specific aspects of analog design. Unlike previously proposed approaches, ASF extends the prevalent "schematic and SPICE" methodology used to design analog and mixed-signal circuits. ASF is topology and technology independent and can be easily integrated into a commercial schematic capture design environment. Furthermore, ASF employs a novel numerical optimization formulation that incorporates classical downhill techniques into stochastic search. ASF consistently produces results comparable to expert manual design with 10x fewer candidate solution evaluations than previously published approaches that rely on traditional stochastic optimization methods.