Digital Computer Arithmetic
Introduction to VLSI Systems
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Parameterized macrocells are a natural extension of libraries of less complex standard cells. An expandable arithmetic block macrocell was designed and implemented. The arithmetic block performs multiplication (using a sequential algorithm), accumulation, addition, and several logic functions. This block can be used in conjunction with other macrocells such as RAMs, ROMs and PLAs to custom design a full digital singal processor with varying bit resolution and storage requirements. The performance of the arithmetic block is enhanced by utilizing domino logic in the critical path. An 8x8 version of the arithmetic block was realized on silicon using a 5 @mm CMOS process. The average 8-bit multiplication time is 1 @ms and the average 16-bit addition time is 260 ns.