PLAYGROUND: minimization of PLAs with mixed ground true outputs

Authors:
Chin-Long Wey;Tsin-Yuan Chang
Affiliations:
Department of Electrical Engineering, Michigan State University, East Lansing, MI;Department of Electrical Engineering, Michigan State University, East Lansing, MI
Venue:
DAC '88 Proceedings of the 25th ACM/IEEE Design Automation Conference
Year:
1988

Citing 4
Cited 0

Logic Minimization Algorithms for VLSI Synthesis

Logic Minimization Algorithms for VLSI Synthesis
Introduction to VLSI Systems

Introduction to VLSI Systems
A State-Machine Synthesizer—SMS

DAC '81 Proceedings of the 18th Design Automation Conference
PAOLA: A tool for topological optimization of large PLAS

DAC '82 Proceedings of the 19th Design Automation Conference

Quantified Score

Hi-index	0.00

Visualization

Abstract

A PLA (Programmable Logic Array) usually uses inverters to complement its output logic. The design can be easily modified using non-inverting buffers if complementary (or, ground true) outputs are needed. In this paper, we explore the tradeoffs in implementing PLAs with/without mixed ground true outputs. An efficient minimization algorithm, namely, PLAYGROUND, is presented. The PLAYGROUND program has been implemented on VAX 8600 in C language. The results of this study indicate that the number of product terms can be further reduced by as much as 50% from the results obtained by the ESPRESSO program when the mixed ground true outputs are used.