The blackboard model of problem solving
AI Magazine
Introduction to VLSI Systems
VLSI leaf cell design by understanding circuit structures
IEA/AIE '89 Proceedings of the 2nd international conference on Industrial and engineering applications of artificial intelligence and expert systems - Volume 1
GENAC: an automatic cell synthesis tool
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
PALACE: a layout generator for SCVS logic blocks
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Expert systems and mathematical optimization approaches on physical layout optimization problems
IEA/AIE '00 Proceedings of the 13th international conference on Industrial and engineering applications of artificial intelligence and expert systems: Intelligent problem solving: methodologies and approaches
A new algorithm for transistor sizing in CMOS circuits
EURO-DAC '90 Proceedings of the conference on European design automation
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In this paper we describe an expert system for layout generation in a hierarchical VLSI design system. It applies a combination of rule- and algorithmic-based techniques on a new layout style. Experimental results have demonstrated the superiority of this expert system against various standard-cell systems and its competitiveness with human designers.