Derivation of a logarithmic time carry lookahead addition circuit

  • Authors:
  • John T. O'donnell;Gudula Rünger

  • Affiliations:
  • Computing Science Department, University of Glasgow, Glasgow G12 8QQ, UK (email: jtod@dcs.gla.ac.uk);Department of Computer Science, Chemnitz University of Technology, 09107 Chemnitz, Germany (email: ruenger@informatik.tu-chemnitz.de)

  • Venue:
  • Journal of Functional Programming
  • Year:
  • 2004

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Abstract

Using Haskell as a digital circuit description language, we transform a ripple carry adder that requires $O(n)$ time to add two $n$-bit words into a parallel carry lookahead adder that requires $O(\log n)$ time. The ripple carry adder uses a scan function to calculate carry bits, but this scan cannot be parallelized directly since it is applied to a non-associative function. Several techniques are applied in order to introduce parallelism, including partial evaluation and symbolic function representation. The derivation given here constitutes a semi-formal correctness proof, and it also brings out explicitly each of the ideas underlying the algorithm.