A Calculus of Communicating Systems
A Calculus of Communicating Systems
POPL '83 Proceedings of the 10th ACM SIGACT-SIGPLAN symposium on Principles of programming languages
The temporal logic of branching time
POPL '81 Proceedings of the 8th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Introduction to VLSI Systems
Characterizing Correctness Properties of Parallel Programs Using Fixpoints
Proceedings of the 7th Colloquium on Automata, Languages and Programming
Automatic Verification of Asynchronous Circuits
Proceedings of the Carnegie Mellon Workshop on Logic of Programs
A hardware semantics based on temporal intervals
A hardware semantics based on temporal intervals
A Switch-Level Model and Simulator for MOS Digital Systems
IEEE Transactions on Computers
Hardware Specification with Temporal Logic: An Example
IEEE Transactions on Computers
Avoiding the state explosion problem in temporal logic model checking
PODC '87 Proceedings of the sixth annual ACM Symposium on Principles of distributed computing
Extending Ina Jo with Temporal Logic
IEEE Transactions on Software Engineering
VVDS: a verification/diagnosis system for VHDL
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
A methodology for hardware verification based on logic simulation
Journal of the ACM (JACM)
State-based model checking of event-driven system requirements
SIGSOFT '91 Proceedings of the conference on Software for citical systems
Sequential circuit verification using symbolic model checking
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Verification of interacting sequential circuits
DAC '90 Proceedings of the 27th ACM/IEEE Design Automation Conference
Querying of Executable Software Specifications
IEEE Transactions on Software Engineering
Model checking and abstraction
POPL '92 Proceedings of the 19th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Model checking and abstraction
ACM Transactions on Programming Languages and Systems (TOPLAS)
Model checking software systems: a case study
SIGSOFT '95 Proceedings of the 3rd ACM SIGSOFT symposium on Foundations of software engineering
Formal methods: state of the art and future directions
ACM Computing Surveys (CSUR) - Special ACM 50th-anniversary issue: strategic directions in computing research
Verification techniques for cache coherence protocols
ACM Computing Surveys (CSUR)
Bounded Delay Timing Analysis of a Class of CSP Programs
Formal Methods in System Design
Synthesis of concurrent systems with many similar processes
ACM Transactions on Programming Languages and Systems (TOPLAS)
Precise timing verification of logic circuits under combined delay model
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
State-Based Model Checking of Event-Driven System Requirements
IEEE Transactions on Software Engineering
A HOL Conversion for Translating Linear Time Temporal Logic to omega-Automata
TPHOLs '99 Proceedings of the 12th International Conference on Theorem Proving in Higher Order Logics
Structured Formal Verification of a Fragment of the IBM S/390 Clock Chip
FM-Trends 98 Proceedings of the International Workshop on Current Trends in Applied Formal Method: Applied Formal Methods
Handbook of automated reasoning
Model checking the composition of hypermedia design components
CASCON '00 Proceedings of the 2000 conference of the Centre for Advanced Studies on Collaborative research
Inductive Verification of Sequential Circuits with a Datapath
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Register Transfer Operation Analysis during Data Path Verification
ASP-DAC '02 Proceedings of the 2002 Asia and South Pacific Design Automation Conference
Model checking on state transition diagram
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Optimization techniques for BDD-based bisimulation computation
Proceedings of the 17th ACM Great Lakes symposium on VLSI
25 Years of Model Checking
25 Years of Model Checking
From Philosophical to Industrial Logics
ICLA '09 Proceedings of the 3rd Indian Conference on Logic and Its Applications
Automated verification of security pattern compositions
Information and Software Technology
Pillars of computer science
FTCS'95 Proceedings of the Twenty-Fifth international conference on Fault-tolerant computing
Asynchronous Logic Circuits and Sheaf Obstructions
Electronic Notes in Theoretical Computer Science (ENTCS)
Formal methods for ranking counterexamples through assumption mining
DATE '12 Proceedings of the Conference on Design, Automation and Test in Europe
| Hi-index | 14.98 |
Verifying the correctness of sequential circuits has been an important problem for a long time. But lack of any formal and efficient method of verification has prevented the creation of practical design aids for this purpose. Since all the known techniques of simulation and prototype testing are time consuming and not very reliable, there is an acute need for such tools. In this paper we describe an automatic verification system for sequential circuits in which specifications are expressed in a propositional temporal logic. In contrast to most other mechanical verification systems, our system does not require any user assistance and is quite fast experimental results show that state machines with several hundred states can be checked for correctness in a matter of seconds!