Inductive Verification of Sequential Circuits with a Datapath

  • Authors:
  • I. Chakrabarti;D. Sarkar;A. K. Majumdar

  • Affiliations:
  • -;-;-

  • Venue:
  • VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
  • Year:
  • 1997

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Abstract

A backward reasoning approach to verify a digital circuit is described. The proposed proof procedure is an augmentation of inductive reasoning over the states of a finite state machine. The augmentation addresses the issues related to reasoning with both the data and control paths of the circuit. The methodology has been illustrated with a lift controller example. Limitation of this proof approach is also identified.