Computational geometry: an introduction
Computational geometry: an introduction
Combinatorial algorithms for integrated circuit layout
Combinatorial algorithms for integrated circuit layout
Introduction to VLSI Systems
DAC '84 Proceedings of the 21st Design Automation Conference
Lyra: A new approach to geometric layout rule checking
DAC '82 Proceedings of the 19th Design Automation Conference
Topology-driven cell layout migration with collinear constraints
ICCD'09 Proceedings of the 2009 IEEE international conference on Computer design
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A model for integrated circuit design rules based on rectangle edge constraints has been proposed by Jeppson, Christensson, and Hedenstierna. This model appears to be the most rigorous proposed to date for the description of such edge-based design rules. However, in certain rare circumstances their model is unable to express the correct design rule when the constrained edges are not adjacent in the layout. We introduce a new notation, called an edge path, which allows us to extend their model to allow for constraints between edges separated by an arbitrary number of intervening edges. Using this notation we enumerate all edge paths that are required to correctly model the original design rule macros of the JCH model, and prove that these macros are sufficient to model the most common rules. We also show how this notation alows us to directly specify many kinds of conditional design rules that required ad hoc specification under the JCH model.