A mathematical model for the verification of systolic networks
SIAM Journal on Computing
A design methodology for synthesizing parallel algorithms and architectures
Journal of Parallel and Distributed Computing
Minimum Distance: A Method for Partitioning Recurrences for Multiprocessors
IEEE Transactions on Computers
Quasi-regular arrays: definition and design methodology
Systolic array processors
Synthesis of a new systolic architecture for the algebraic path problem
Science of Computer Programming
Control generation in the design of processor arrays
Journal of VLSI Signal Processing Systems - Parallel processing on VLSI arrays
Time Optimal Linear Schedules for Algorithms with Uniform Dependencies
IEEE Transactions on Computers
Synthesis of ASIC regular arrays for real-time image processing systems
Journal of VLSI Signal Processing Systems - Special issue: algorithms and parallel VSLI architecture
Transformation of broadcasts into propagations in systolic algorithms
Journal of Parallel and Distributed Computing
Partitioning of processor arrays: a piecewise regular approach
Integration, the VLSI Journal - Special issue on algorithms and architectures
Resource constrained scheduling of uniform algorithms
Journal of VLSI Signal Processing Systems
Optimal Synthesis of Algorithm-Specific Lower-Dimensional Processor Arrays
IEEE Transactions on Parallel and Distributed Systems
The Organization of Computations for Uniform Recurrence Equations
Journal of the ACM (JACM)
The parallel execution of DO loops
Communications of the ACM
Parallel Computation on Regular Arrays
Parallel Computation on Regular Arrays
Introduction to VLSI Systems
Design of Space-Optimal Regular Arrays for Algorithms with Linear Schedules
IEEE Transactions on Computers
A Processor-Time-Minimal Systolic Array for Cubical Mesh Algorithms
IEEE Transactions on Parallel and Distributed Systems
A Processor-Time-Minimal Systolic Array for Transitive Closure
IEEE Transactions on Parallel and Distributed Systems
On Time Mapping of Uniform Dependence Algorithms into Lower Dimensional Processor Arrays
IEEE Transactions on Parallel and Distributed Systems
Space-Optimal Linear Processor Allocation for Systolic Arrays Synthesis
IPPS '92 Proceedings of the 6th International Parallel Processing Symposium
Automatic synthesis of systolic arrays from uniform recurrent equations
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Complexity of matrix product on modular linear systolic arrays for algorithms with affine schedules
Journal of Parallel and Distributed Computing
Journal of Parallel and Distributed Computing
A parallel algorithm for lattice construction
ICFCA'05 Proceedings of the Third international conference on Formal Concept Analysis
Parallel computation of closed itemsets and implication rule bases
ISPA'07 Proceedings of the 5th international conference on Parallel and Distributed Processing and Applications
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This paper deals with the systematic synthesis of space optimal arrays. As a target example, an asymptotically space-optimal array for Nx × Ny × Nz rectangular mesh algorithms with affine schedule ai + bj + ck + d is designed. The obtained bound improves the best previously known ones. The key idea underlying our approach is to compress the initial index domain along a number of directions in order to obtain a new domain that is more suitable for the application of projection methods.