The C programming language
Logic design of digital systems
Logic design of digital systems
Introduction to VLSI Systems
DAC '83 Proceedings of the 20th Design Automation Conference
A State-Machine Synthesizer—SMS
DAC '81 Proceedings of the 18th Design Automation Conference
Automatic PLA synthesis from a DDL-P description
DAC '81 Proceedings of the 18th Design Automation Conference
A multiple delay simulator for MOS LSI circuits
DAC '80 Proceedings of the 17th Design Automation Conference
A logic minimizer for VLSI PLA design
DAC '82 Proceedings of the 19th Design Automation Conference
Synchronous path analysis in MOS circuit simulator
DAC '82 Proceedings of the 19th Design Automation Conference
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
PLAYER: a PLA design system for VLSI's
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A unified treatment of PLA faults by Boolean differences
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
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This paper describes a fully automated finite-state machine (FSM) synthesis system. The FSM is realized as a PLA. This synthesizer accepts a high-level description of the FSM and generates a mask level layout. Several simulation models are produced at different levels of abstraction; these models can be integrated with other modules on the chip to aid in the debugging of the overall VLSI chip design. Valuable information on speed, area, and testability of the PLA can be obtained through a collection of audit programs. This system has been used to design complex controllers for many VLSI chips at AT & T Bell Laboratories. Although a PLA implementation is assumed, the system can be extended to synthesize a random logic implementation of the FSM.