ACORN: a local customization approach to DCVS physical design
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
A hierarchical gate array architecture and design methodology
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Introduction to VLSI Systems
ACORN: a system for CVS macro design by tree placement and tree customization
IBM Journal of Research and Development
A Simple Yet Effective Technique for Global Wiring
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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Vanguard is a new physical design system which combines advantages of gate array and custom design methods to produce high-density chips on non-custom regular images. Vanguard physically partitions a chip into subchips which define macro boundaries and which contain not only macro circuitry and internal macro wires but also inter-macro connections and portions of connections which are part of the final chip design and lie within that region. Subchips are individually designed and then connected by abutment to assemble the chip. Vanguard has been used to design a 32-bit DCVS microprocessor comprising 13 macros, including a large register array.