Optimization of Mutual and Signature Testing Schemes for Highly Concurrent Systems
Journal of Electronic Testing: Theory and Applications
Introduction to VLSI Systems
A Tutorial on Built-in Self-Test. I. Principles
IEEE Design & Test
Efficient Implementation of Multiple On-Chip Signature Checking
VLSID '97 Proceedings of the Tenth International Conference on VLSI Design: VLSI in Multimedia Applications
Hybrid Testing Schemes Based on Mutual and Signature Testing
VLSID '98 Proceedings of the Eleventh International Conference on VLSI Design: VLSI for Signal Processing
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Mutual testing is a technique for both on-line and off-linebuilt-in self-test in VLSI circuits. The essentialidea in mutual testing is that if identical test patternsare applied to the circuit under test and its alternateimplementation, the two must generate identicaloutputs. The circuit is declared faulty if the outputsdo not match in content. Mutual testing will fail ifthe waveforms are compared in time, since thealternate implementations of the circuit may differ inspeed, making it necessary to apply tests at differentclock rates. Even when the two implementations areinstantiations of the same block, their responses toidentical inputs will differ in frequency, phase, noisecontent, and amplitude, depending on the physicalplacement of the two instances. We describe the useof the Discrete Wavelet Transform to compare thetwo signals in time as well as frequency domains.The proposed technique has several benefits. Itreduces the yield loss due to misclassification ofgood circuits due to incorrect comparison. Secondly,it permits the at-speed testing of a block even whenthe alternate implementation of the block is tested ata slower speed. The test power reduction due toslower-speed testing of the alternate implementationis also a distinct advantage.