PLA driver selection: an analytic approach

Authors:
Fred W. Obermeier;Randy H. Katz
Affiliations:
Conlputer Science Division, Electrical Engineering and Computer Sciences Department, University of California, Berkeley CA;Conlputer Science Division, Electrical Engineering and Computer Sciences Department, University of California, Berkeley CA
Venue:
DAC '85 Proceedings of the 22nd ACM/IEEE Design Automation Conference
Year:
1985

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Abstract

Few integrated circuit design tools support the rapid exploration of the design space across performance alternatives. Such a tool must rely on extensive analysis of fundamental design issues, to provide the basis for this exploration. These detailed analyses are summarized as simple “rules-of-thumb.” A more flexible class of design tools can use these to generate integrated circuit designs with more desirable performance.This paper describes the detailed analysis of the PLA driver selection problem. Rules-of-thumb which summarize these results for nMOS, are developed and applied to a large CPU design project currently underway at Berkeley. A maximum critical driver delay improvement of 46% was realized.