Implementation of a fast programmable edge detection preprocessor

Authors:
M. K. Selmane;C. R. Allen
Affiliations:
Department of Electrical and Electronic Engineering, University of Newcastle upon Tyne, U.K.;Department of Electrical and Electronic Engineering, University of Newcastle upon Tyne, U.K.
Venue:
Pattern Recognition Letters
Year:
1983

Citing 3
Cited 0

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Abstract

The initial preprocessor stage of a symbolic Image Classification Computer has been designed in low power Schottky TTL. Image data from a camera is processed by a set of programmable, but identical boards controlled by a single MC68000 16-bit microcomputer. The programmable edge detector board may process data rates of up to 10 MHz, and is designed specifically for integration into a single VLSI design. Applications are presented for the Sobel and Kirsch operators.