MOS circuit models in Network C

  • Authors:
  • William S. Beckett

  • Affiliations:
  • UW/NW VLSI Consortium, Department of Computer Science, University of Washington

  • Venue:
  • DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
  • Year:
  • 1986

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Abstract

Network C is a programming language designed for constructing simulation models of VLSI circuits and systems. The language, which is a superset of C, supports a range of modeling capabilities including approximate solution of Kirchoff equations at the circuit level and discrete event functional simulation at the system level. When used to model a MOS circuit, the system first decomposes the circuit into a set of independent stages. The values of nodes, represented by piece-wise linear functions, are communicated between stages using discrete event scheduling. The determination of these piece-wise linear functions is based on continuous time calculations. The result of this hybrid approach is a fast simulation capability which maintains enough accuracy to capture both the digital and analog aspects of a circuit's behavior.